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AP3302 Pt3 Contents

AP3302 Pt3 Section 2Contents

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AP 3302 Pt. 3

Section 2

CHAPTER 5

Clamping Circuits

B to C. With the diode conducting, C charges on a short time constant of CRD seconds. Vc rises quickly to + 50V and VR falls to zero in the same time. The diode is now cut off.

C to D. The input falls by 100V from + 50V to - 50V. Since Vc cannot change instantly VR falls by 100V to -100V, keeping the diode cut off.

D to E. With the diode cut off, C discharges on a long time constant of CR seconds causing Vc to fall slightly from + 50V and VR to rise slightly from -100V.

E to F. The input rises by 100V from - 50V to + 50V. Vc cannot change instantly so VR rises by 100V to a slightly positive value, cutting on the diode.

F to G. With the diode conducting, C charges on a short CRD and Vc rises quickly to + 50V as VR returns to zero, producing the familiar pip. The diode is now cut off.

Thereafter the action is repeated. Except for the small positive pips the output VR is clamped to zero volts, the output varying negatively from this level. DC restoration has also taken place, as a comparison of the mean levels of input and output will show.

Clamping to any Level

The examples considered so far clamp the output waveform either positively or negatively to zero volts. In some radar circuits the output must be clamped to a level other than zero. The level to which the peak or the base of the waveform is clamped is determined by the voltage to which R and the appropriate diode electrode are returned. In every case so far R has been connected to earth (zero volts). Let us now consider some examples of clamping to other levels.

A circuit which gives negative clamping to a positive bias level is illustrated in Fig. 7a. Because of the inclusion of the bias voltage VB two points should be noted

a. Vin = Vc + VR + VB at all times.

b. Vout = VR + VB at all times.


 

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